1. Technical Field
The present disclosure relates to a hardware image compression system, and more particular to hardware architecture of a variable length encoding (VLE) device of a hardware image compression system.
2. Related Art
Generally speaking, image compression usually involves three main steps, namely, transform, quantization, and encoding. Transform means transforming original image data (for example, original image data represented in the YUV (YCbCr) system) into another representation, and the original image data can be recovered from the transformed data through inverse transform. The transform aims at removing spatial redundancy. For example, transform methods include Discrete Cosine Transform (DCT) used in the video image compression process of MPEG-2 images. Common encoding methods include statistics-based run length encoding (RLE) and entropy encoding.
For dynamic image compression, an image is usually divided into a plurality of 16*16 pixel macro-blocks (MBs), and each MB is further divided into four 8*8 blocks, which are basic units for image compression. The DCT is performed in a unit of an 8*8 block, and after the DCT is completed, the DCT coefficient is still an 8*8 matrix. In Microsoft VC-1, each 8*8 block is further divided into 8*8, 8*4, 4*8, and 4*4 subblocks for the RLE. The transformed block image is then transformed into a sequence of block image signals by quantization and zigzag transform, and afterward, the sequence of block image signals is encoded. Both the RLE and entropy encoding belong to the VLE, and thus require more time than the DCT, quantization, DC/AC prediction, and zigzag transform.
For a typical hardware image compression system, the entire hardware system is divided into a plurality of image processing modules for respectively performing different image compression steps, such as a transform module, a quantization module and other possible image processing modules, and the image processing modules are respectively started by an operating procedure of the image compression system in sequence to perform different image compression steps on block images, for example, published U.S. Pat. No. 4,816,914 entitled “Method and apparatus for efficiently encoding and decoding image sequences”. Generally speaking, the image processing modules are different in terms of computational complexity and time, and particularly, the encoding step in the image compression system has a higher computational complexity than other steps, and thus requires more processing time than processing steps such as the DCT, quantization, DC/AC prediction, and zigzag transform, such that the operating rate of the entire hardware image compression system depends on the VLE module, thereby affecting the throughput rate of the image compression system.